# ORPD

# Bitwise Logical OR of Double-Precision Floating-Point Values

Opcode	Mnemonic	Description
66 0F 56 /r	ORPD xmm1, xmm2/m128	Bitwise OR of xmm2/m128 and xmm1..

# Description

Performs a bitwise logical OR of the two packed double-precision floating-point values from the source operand (second operand) and the destination operand (first operand), and stores the result in the destination operand. The source operand can be an XMM register or a 128-bit memory location. The destination operand is an XMM register.

# Operation

Destination[0..127] = Destination[0..127] | Source[0..127];

1
2

# SIMD Floating-Point Exceptions

None.

# Protected Mode Exceptions


#GP(0)	For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.
#GP(0)	For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.
#SS(0)	For an illegal address in the SS segment.
#PF(fault-code)	For a page fault.
#NM	If TS in CR0 is set.

# Real-Address Mode Exceptions


#GP(0)	If a memory operand is not aligned on a 16-byte boundary, regardless of segment. If any part of the operand lies outside the effective address space from 0 to FFFFH.
#GP(0)	If a memory operand is not aligned on a 16-byte boundary, regardless of segment. If any part of the operand lies outside the effective address space from 0 to FFFFH.
#NM	If TS in CR0 is set.

# Virtual-8086 Mode Exceptions

Same exceptions as in Real Address Mode


#PF(fault-code)	For a page fault

Instruction	Latency	Throughput	Execution Unit
CPUID	0F3n/0F2n	0F3n/0F2n	0F2n
ORPD xmm, xmm	4/4	2/2	MMX_ALU

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