x86 Instruction Set Reference

# CVTSI2SS

# Convert Doubleword Integer to Scalar Single- Precision Floating-Point Value

Opcode Mnemonic Description
F3 0F 2A /r CVTSI2SS xmm, r/m32 Convert one signed doubleword integer from r/m32 to one single-precision floating-point value in xmm.

# Description

Converts a signed doubleword integer in the source operand (second operand) to a single-precision floating-point value in the destination operand (first operand). The source operand can be a general-purpose register or a 32-bit memory location. The destination operand is an XMM register. The result is stored in the low doubleword of the destination operand, and the upper three doublewords are left unchanged. When a conversion is inexact, the value returned is rounded according to the rounding control bits in the MXCSR register.

# Operation

Destination[0..31] = ConvertIntegerToFloat(Source[0..31]);
//Destination[32..127] remains unchanged
1
2
3

# SIMD Floating-Point Exceptions

Precision.

# Protected Mode Exceptions
#GP(0) For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments.
#GP(0) For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments.
#SS(0) For an illegal address in the SS segment.
#PF(fault-code) For a page fault.
#NM If TS in CR0 is set.
#XM If an unmasked SIMD floating-point exception and OSXMMEXCPT in CR4 is 1.
#UD If an unmasked SIMD floating-point exception and OSXMMEXCPT in CR4 is 0. If EM in CR0 is set. If OSFXSR in CR4 is 0. If CPUID feature flag SSE is 0.

# Real-Address Mode Exceptions
#GP(0) If any part of the operand lies outside the effective address space from 0 to FFFFH.
#GP(0) If any part of the operand lies outside the effective address space from 0 to FFFFH.
#NM If TS in CR0 is set.
#XM If an unmasked SIMD floating-point exception and OSXMMEXCPT in CR4 is 1.

# Virtual-8086 Mode Exceptions

Same exceptions as in Real Address Mode
#PF(fault-code) For a page fault.
#PF(fault-code) For a page fault.
Instruction Latency Throughput Execution Unit
CPUID 0F3n/0F2n/069n 0F3n/0F2n/069n 0F2n
CVTSI2SS xmm, r32 12/11/4 2/2/2 FP_ADD MMX_SHFT MMX_MISC

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